


#include 	"main.h"



lpspi_tx_cmd_config_t Lpspi0_TxCfg =
{
	.whichPcs = LPSPI_PCS0,										/* PCS=0: Transfer using PCS0 */
	.width = LPSPI_SINGLE_BIT_XFER,						/* WIDTH=0: Single bit transfer */
  .clkPhase = LPSPI_CLOCK_PHASE_2ND_EDGE,		/* CPHA=0: Change data on SCK lead'g, capture on trail'g edge   LPSPI_CLOCK_PHASE_2ND_EDGE*/
  .clkPolarity =  LPSPI_SCK_ACTIVE_HIGH,			/* CPOL=0: SCK inactive state is HIGH */
	.lsbFirst = false,												/* LSBF=0: Data is transfered MSB first */
	.txMask 	= false,												/* TXMSK=0: Normal transfer: data loaded from tx FIFO */                          
	.rxMask		= false,												/* RXMSK=0: Normal transfer: rx data stored in rx FIFO */
	.contTransfer = true,											/* CONTC=0: Continuous transfer disabled */
	.contCmd =  false,												/* Master option to change cmd word within cont transfer. */
	.frameSize = 8,														/* FRAMESZ=7: # bits in frame = 7+1=8 */
	.preDiv    = 1,														/* PRESCALE=2: Functional clock divided by 2*2 = 4 */
	.byteSwap = false, 												/* BYSW=0: Byte swap disabled */
};

Bsw_Lpspi_Cfg 	LPSPI0_Cfg =
{
	.base = LPSPI2,													/*SPI硬件模块选择:  LPSPI1*/
	.clockName = LPSPI2_CLK,
	.clockSource = 6,
	.b_TxDmaCmd = true ,											/* TXDMA not used */
	.b_RxDmaCmd = true ,												/* RXDMA not used */
	.Lpspi_mode = LPSPI_MASTER,								/* Set for master mode */ 
	
	.PinCfg = LPSPI_SDI_IN_SDO_OUT, 
	.DataOutCfg = LPSPI_DATA_OUT_RETAINED, 
	.b_Pcs_Enable = true,
	.b_SampleDly = 	false,
	.txWater = 1,
	.rxWater = 0,
	.Cmd_Cfg = &Lpspi0_TxCfg,
	.u32_SCKDIV = 8,
	.u32_SCKPCS = 20,
	.u32_PCSSCK = 20,
	.u32_DBT = 10,
	.Lpspi_Pcs = LPSPI_PCS0,
  .PcsPolarity = LPSPI_ACTIVE_LOW,
};

BSW_Dma_Cfg SPI0_TxDma =
{
	.DMA_Ch 					=	DMA_CH0,				/*配置DMA通道    				eg: DMA_CH0								*/
	.IRQn						=	DMA0_IRQn,
//	.SrcAddr					=	(u32)TCD0_Source,		/*配置源地址				eg: (u32)Dma_Src			*/
	.SrcOffset					=	1,						/*自动累加源地址大小			eg: 1 每次传输地址自动加1			*/
	.SrcTrfSize 				=	EDMA_TRANSFER_SIZE_1B,	/*源地址单次传输几个字节		eg:	EDMA_TRANSFER_SIZE_1B 	*/
	.SrcLastAdj       			= 	0,						/*配置传输完成时是否更改源地址	eg: 0 不更改源地址				*/
	
//	.DestAddr					=	(u32)TCD0_Dest,			/*配置目标地址				eg: (u32)Dma_Dest			*/
	.DestOffset					=	0,						/*自动累加目标地址大小			eg: 1 每次传输地址自动加1			*/
	.DestTrfSize				=	EDMA_TRANSFER_SIZE_1B,	/*目标地址单次传输几个字节		eg:	EDMA_TRANSFER_SIZE_1B 	*/
	.DestLastAdj      			= 	0,						/*配置传输完成时是否更改目标地址	eg: 0 不更改目标地址				*/
	
	.SetNbytes					=	1,						/*DMA开启每次传输几个字节		eg: 1  每次传输1个字节			*/
	.SetMjrCount				=	6,						/*DMA开启每次循环的次数 		eg: 10 每次传输多少次			*/
	.b_MjrCpltIrq				= 	true,					/*配置是否传输完成中断										*/
	.b_HlfCpltIrq				= 	false,
	.b_DmaRqstDone				=	true,					/*传输结束是否自动关闭DMA		eg: true 自动关闭DMA 			*/
	.b_Dma_En					=	false,					/* DMA使能配置				eg: true 使能DMA触发传输		*/
};

BSW_Dma_Cfg SPI0_RxDma =
{
	.DMA_Ch 			=	DMA_CH1,						/*配置DMA通道    									eg: DMA_CH0								*/
	.IRQn				=	DMA1_IRQn,
//	.SrcAddr			=	(u32)TCD0_Source,				/*配置源地址											eg: (u32)Dma_Src					*/
	.SrcOffset			=	0,								/*自动累加源地址大小							eg: 1 每次传输地址自动加1	*/
	.SrcTrfSize 		=	EDMA_TRANSFER_SIZE_1B,			/*源地址单次传输几个字节					eg:	EDMA_TRANSFER_SIZE_1B */
	.SrcLastAdj       	= 	0,								/*配置传输完成时是否更改源地址		eg: 0 不更改源地址				*/
	
//	.DestAddr			=	(u32)TCD0_Dest,					/*配置目标地址										eg: (u32)Dma_Dest					*/
	.DestOffset			=	1,								/*自动累加目标地址大小						eg: 1 每次传输地址自动加1	*/
	.DestTrfSize		=	EDMA_TRANSFER_SIZE_1B,			/*目标地址单次传输几个字节				eg:	EDMA_TRANSFER_SIZE_1B */
	.DestLastAdj      	= 	0,								/*配置传输完成时是否更改目标地址	eg: 0 不更改目标地址			*/
	
	.SetNbytes			=	1,								/*DMA开启每次传输几个字节					eg: 1  每次传输1个字节		*/
	.SetMjrCount		=	7,								/*DMA开启每次循环的次数 					eg: 10 每次传输多少次			*/
	.b_MjrCpltIrq		= 	true,							/*配置是否传输完成中断		*/
	.b_HlfCpltIrq		= 	false,
	.b_DmaRqstDone		=	true,							/*传输结束是否自动关闭DMA					eg: true 自动关闭DMA 			*/
	.b_Dma_En			=	false,							/* DMA使能配置										eg: true 使能DMA触发传输	*/
};


#ifdef MSGLEN
#undef MSGLEN
#endif
#define MSGLEN			6						/*MC33771指令长度单位字节： 5个字节*/

u8 Sample_Data_Source[20]={0x00,0x00,0x01,0x00,0x01,0x41,0x00,0x01,0x01,0x00,0x02,0x85};
u8 Sample_Data_Dest[20] = {0};
//wangtao multiply
static u32 G_MC33771_Rx_Addr;			/*数据接收的首地址*/
static u32	G_MC33771_Tx_Addr;			/*数据发送的首地址*/


void ECU_SPI_INIT(void)
{
//	BSW_GPIO_MUX_CONFIG(Bsw_Port_B,2,PORT_MUX_ALT3);			/* 	PB2: 	MUX = ALT3, LPSPI0_SCK 	*/
//	BSW_GPIO_MUX_CONFIG(Bsw_Port_B,3,PORT_MUX_ALT3);			/* 	PB3: 	MUX = ALT3, LPSPI0_SIN 	*/
//	BSW_GPIO_MUX_CONFIG(Bsw_Port_B,4,PORT_MUX_ALT3);			/* 	PB4: 	MUX = ALT3, LPSPI0_SOUT */
//	BSW_GPIO_MUX_CONFIG(Bsw_Port_B,5,PORT_MUX_ALT3);			/* 	PB5: 	MUX = ALT3, LPSPI0_PCS1 */
	BSW_GPIO_MUX_CONFIG(Bsw_Port_E,15,PORT_MUX_ALT3);			/* 	PE15: 	MUX = ALT3, LPSPI2_SCK */
	BSW_GPIO_MUX_CONFIG(Bsw_Port_A,8,PORT_MUX_ALT3);			/* 	PA8: 	MUX = ALT3, LPSPI2_MISO */
	BSW_GPIO_MUX_CONFIG(Bsw_Port_E,16,PORT_MUX_ALT3);			/* 	PE16: 	MUX = ALT3, LPSPI2_MOSI */
	BSW_GPIO_MUX_CONFIG(Bsw_Port_A,9,PORT_MUX_ALT3);			/* 	PA9: 	MUX = ALT3, LPSPI2_PCS0 */
	BSW_GPIO_MUX_CONFIG(Bsw_Port_A,13,PORT_MUX_AS_GPIO);		/*	PA13:	MUX = ALT1, GPIO_PTA13 */
	BSW_GPIO_Direction(PTA,13,1);								/*  GPIO_PTE11设置为输出	MC33771_RESET */
    BSW_GPIO_SetBits(PTA,13);
	
	/********************LPSPI0配置**************************/
	BSW_LPSPI_INIT(LPSPI0_Cfg);
	/*****************DMA通道对应的设置**********************/
	
	G_MC33771_Tx_Addr = (u32)Sample_Data_Source;
	G_MC33771_Rx_Addr = (u32)Sample_Data_Dest;
	
	
	BSW_DMAMUX_INIT(SPI0_TxDma.DMA_Ch,EDMA_REQ_LPSPI2_TX);
	SPI0_TxDma.SrcAddr = G_MC33771_Tx_Addr;
	SPI0_TxDma.DestAddr = (u32)&(LPSPI2->TDR);
	BSW_DMA_INIT_CFG(SPI0_TxDma);

	BSW_DMAMUX_INIT(SPI0_RxDma.DMA_Ch,EDMA_REQ_LPSPI2_RX);
	SPI0_RxDma.SrcAddr = (u32)&(LPSPI2->RDR);
	SPI0_RxDma.DestAddr = G_MC33771_Rx_Addr;
	BSW_DMA_INIT_CFG(SPI0_RxDma);
}


//wangtao multiply
static u8 G_b_DMA3_IDE_Flg = false;
static u8 G_u8_Arr_len = 0;

void ECU_SPI_DMA_START(void)
{
	G_u8_Arr_len = 2;

    memset(Sample_Data_Dest,0,sizeof(Sample_Data_Dest));
    
	G_MC33771_Tx_Addr = (u32)Sample_Data_Source;
	G_MC33771_Rx_Addr = (u32)Sample_Data_Dest;

	BSW_DMA_REINIT(DMA_CH0,G_MC33771_Tx_Addr,(u32)(&(LPSPI2->TDR)),MSGLEN);	
	BSW_DMA_REINIT(DMA_CH1,(u32)(&(LPSPI2->RDR)),G_MC33771_Rx_Addr,MSGLEN+1);
	BSW_DMA_START(DMA_CH0);
	BSW_DMA_START(DMA_CH1);
}

uint32_t spi2_dmatxirq=0;
uint32_t spi2_dmarxirq=0;

void SPI2_DMA_IRQ_TX(void)
{
    spi2_dmatxirq++;
    LPSPI_ClearContCBit(LPSPI2);
}

void SPI2_DMA_IRQ_RX(void)
{
	static u8 s_u8_Dma3_Count = 0;

    spi2_dmarxirq++;
	
	if(s_u8_Dma3_Count < G_u8_Arr_len-1)
	{
		
		G_MC33771_Rx_Addr = G_MC33771_Rx_Addr + 7;
		G_MC33771_Tx_Addr = G_MC33771_Tx_Addr + 6;		/*传输的结构体长度为6个字节 地址每次需要偏移6*/
		BSW_DMA_REINIT(DMA_CH0,G_MC33771_Tx_Addr,(u32)(&(LPSPI2->TDR)),MSGLEN);	
		BSW_DMA_REINIT(DMA_CH1,(u32)(&(LPSPI2->RDR)),G_MC33771_Rx_Addr,MSGLEN+1);
		BSW_DMA_START(DMA_CH0);
		BSW_DMA_START(DMA_CH1);
		s_u8_Dma3_Count ++;
	}
	else
	{
		G_b_DMA3_IDE_Flg = true;
		s_u8_Dma3_Count = 0;
	}
}

#define __SPI1_W5500_CODE__
/*************************w5500****************************/
//SPI_CLK=PCS/(2^prediv*(SCKDIV+2))=40MHz/(2^1*(8+2))=2MHz

static lpspi_tx_cmd_config_t Lpspi1_TxCfg =
{
    .whichPcs = LPSPI_PCS3,                         /* PCS=3: Transfer using PCS0 */
    .width = LPSPI_SINGLE_BIT_XFER,                 /* WIDTH=0: Single bit transfer */
    .clkPhase = LPSPI_CLOCK_PHASE_2ND_EDGE,         /* CPHA=0: Change data on SCK lead'g, capture on trail'g edge   LPSPI_CLOCK_PHASE_2ND_EDGE*/
    .clkPolarity =  LPSPI_SCK_ACTIVE_LOW,			/* CPOL=0: SCK inactive state is HIGH */
    .lsbFirst = false,								/* LSBF=0: Data is transfered MSB first */
    .txMask 	= false,							/* TXMSK=0: Normal transfer: data loaded from tx FIFO */                          
    .rxMask		= false,							/* RXMSK=0: Normal transfer: rx data stored in rx FIFO */
    .contTransfer = true,							/* CONTC=0: Continuous transfer disabled */
    .contCmd =  false,								/* Master option to change cmd word within cont transfer. */
    .frameSize = 8,									/* FRAMESZ=7: # bits in frame = 7+1=8 */
    .preDiv    = 1,									/* PRESCALE=2: Functional clock divided by 2*2 = 4 */
    .byteSwap = false, 								/* BYSW=0: Byte swap disabled */
};

static Bsw_Lpspi_Cfg 	LPSPI1_Cfg =
{
	.base = LPSPI1,                                 /*SPI硬件模块选择:  LPSPI1*/
	.clockName = LPSPI1_CLK,
	.clockSource = 6,                               /* Enable PCS=SPLL_DIV2 (40 MHz func'l clock) */
	.b_TxDmaCmd = true ,											/* TXDMA not used */
	.b_RxDmaCmd = true ,												/* RXDMA not used */
	.Lpspi_mode = LPSPI_MASTER,                     /* Set for master mode */ 
	
	.PinCfg = LPSPI_SDI_IN_SDO_OUT, 
	.DataOutCfg = LPSPI_DATA_OUT_RETAINED, 
	.b_Pcs_Enable = true,
	.b_SampleDly = 	false,
	.txWater = 1,
	.rxWater = 0,
	.Cmd_Cfg = &Lpspi1_TxCfg,
	.u32_SCKDIV = 8,
	.u32_SCKPCS = 20,
	.u32_PCSSCK = 20,
	.u32_DBT = 10,
	.Lpspi_Pcs = LPSPI_PCS3,
  .PcsPolarity = LPSPI_ACTIVE_LOW,
};

static BSW_Dma_Cfg SPI1_TxDma =
{
	.DMA_Ch 					=	DMA_CH4,				/*配置DMA通道    				eg: DMA_CH0								*/
	.IRQn						=	DMA4_IRQn,
//	.SrcAddr					=	(u32)TCD0_Source,		/*配置源地址				eg: (u32)Dma_Src			*/
	.SrcOffset					=	1,						/*自动累加源地址大小			eg: 1 每次传输地址自动加1			*/
	.SrcTrfSize 				=	EDMA_TRANSFER_SIZE_1B,	/*源地址单次传输几个字节		eg:	EDMA_TRANSFER_SIZE_1B 	*/
	.SrcLastAdj       			= 	0,						/*配置传输完成时是否更改源地址	eg: 0 不更改源地址				*/
	
//	.DestAddr					=	(u32)TCD0_Dest,			/*配置目标地址				eg: (u32)Dma_Dest			*/
	.DestOffset					=	0,						/*自动累加目标地址大小			eg: 1 每次传输地址自动加1			*/
	.DestTrfSize				=	EDMA_TRANSFER_SIZE_1B,	/*目标地址单次传输几个字节		eg:	EDMA_TRANSFER_SIZE_1B 	*/
	.DestLastAdj      			= 	0,						/*配置传输完成时是否更改目标地址	eg: 0 不更改目标地址				*/
	
	.SetNbytes					=	1,						/*DMA开启每次传输几个字节		eg: 1  每次传输1个字节			*/
//	.SetMjrCount				=	6,						/*DMA开启每次循环的次数 		eg: 10 每次传输多少次			*/
	.b_MjrCpltIrq				= 	true,					/*配置是否传输完成中断										*/
	.b_HlfCpltIrq				= 	false,
	.b_DmaRqstDone				=	true,					/*传输结束是否自动关闭DMA		eg: true 自动关闭DMA 			*/
	.b_Dma_En					=	false,					/* DMA使能配置				eg: true 使能DMA触发传输		*/
};

static BSW_Dma_Cfg SPI1_RxDma =
{
	.DMA_Ch 			=	DMA_CH5,						/*配置DMA通道    									eg: DMA_CH0								*/
	.IRQn				=	DMA5_IRQn,
//	.SrcAddr			=	(u32)TCD0_Source,				/*配置源地址											eg: (u32)Dma_Src					*/
	.SrcOffset			=	0,								/*自动累加源地址大小							eg: 1 每次传输地址自动加1	*/
	.SrcTrfSize 		=	EDMA_TRANSFER_SIZE_1B,			/*源地址单次传输几个字节					eg:	EDMA_TRANSFER_SIZE_1B */
	.SrcLastAdj       	= 	0,								/*配置传输完成时是否更改源地址		eg: 0 不更改源地址				*/
	
//	.DestAddr			=	(u32)TCD0_Dest,					/*配置目标地址										eg: (u32)Dma_Dest					*/
	.DestOffset			=	1,								/*自动累加目标地址大小						eg: 1 每次传输地址自动加1	*/
	.DestTrfSize		=	EDMA_TRANSFER_SIZE_1B,			/*目标地址单次传输几个字节				eg:	EDMA_TRANSFER_SIZE_1B */
	.DestLastAdj      	= 	0,								/*配置传输完成时是否更改目标地址	eg: 0 不更改目标地址			*/
	
	.SetNbytes			=	1,								/*DMA开启每次传输几个字节					eg: 1  每次传输1个字节		*/
//	.SetMjrCount		=	7,								/*DMA开启每次循环的次数 					eg: 10 每次传输多少次			*/
	.b_MjrCpltIrq		= 	true,							/*配置是否传输完成中断		*/
	.b_HlfCpltIrq		= 	false,
	.b_DmaRqstDone		=	true,							/*传输结束是否自动关闭DMA					eg: true 自动关闭DMA 			*/
	.b_Dma_En			=	false,							/* DMA使能配置										eg: true 使能DMA触发传输	*/
};

u32 G_W5500_Rx_Addr;    /*数据接收的首地址*/
u32 G_W5500_Tx_Addr;    /*数据发送的首地址*/
u32 G_u32_W5500_MUX_R_busy=0;
u32 G_u32_W5500_MUX_T_busy=0;

u8 pTmpBuf1[DATA_BUF_SIZE + 3];//tx
u8 pTmpBuf2[DATA_BUF_SIZE + 3];//rx

SemaphoreHandle_t xW5500TxSem;
SemaphoreHandle_t xW5500RxSem;

uint32_t spi1_dmatxirq=0;
uint32_t spi1_dmarxirq=0;



void ECU_W5500_SPI_INIT(void)
{
	BSW_GPIO_MUX_CONFIG(Bsw_Port_B,14,PORT_MUX_ALT3);			/* 	PB14: 	MUX = ALT3, LPSPI2_SCK */
	BSW_GPIO_MUX_CONFIG(Bsw_Port_B,15,PORT_MUX_ALT3);			/* 	PB15: 	MUX = ALT3, LPSPI2_MISO */
	BSW_GPIO_MUX_CONFIG(Bsw_Port_B,16,PORT_MUX_ALT3);			/* 	PB16: 	MUX = ALT3, LPSPI2_MOSI */
	BSW_GPIO_MUX_CONFIG(Bsw_Port_B,17,PORT_MUX_ALT3);			/* 	PB17: 	MUX = ALT3, LPSPI2_PCS0 */

    //二进制信号量创建后是空的
    xW5500TxSem=xSemaphoreCreateBinary();
    if(xW5500TxSem!=NULL)
        xSemaphoreGive(xW5500TxSem);
    xW5500RxSem=xSemaphoreCreateBinary();
	/********************LPSPI0配置**************************/
	BSW_LPSPI_INIT(LPSPI1_Cfg);
	/*****************DMA通道对应的设置**********************/
	
	G_W5500_Tx_Addr = (u32)pTmpBuf1;
	G_W5500_Rx_Addr = (u32)pTmpBuf2;
	
	BSW_DMAMUX_INIT(SPI1_TxDma.DMA_Ch,EDMA_REQ_LPSPI1_TX);
	SPI1_TxDma.SrcAddr = G_W5500_Tx_Addr;
	SPI1_TxDma.DestAddr = (u32)&(LPSPI1->TDR);
	BSW_DMA_INIT_CFG(SPI1_TxDma);

	BSW_DMAMUX_INIT(SPI1_RxDma.DMA_Ch,EDMA_REQ_LPSPI1_RX);
	SPI1_RxDma.SrcAddr = (u32)&(LPSPI1->RDR);
	SPI1_RxDma.DestAddr = G_W5500_Rx_Addr;
	BSW_DMA_INIT_CFG(SPI1_RxDma);
}

void ECU_W5500_SPI_DMA_START(void)
{
    G_W5500_Tx_Addr = (u32)pTmpBuf1;
    G_W5500_Rx_Addr = (u32)pTmpBuf2;

    BSW_DMA_REINIT(DMA_CH4,G_W5500_Tx_Addr,(u32)(&(LPSPI1->TDR)),MSGLEN);	
    BSW_DMA_REINIT(DMA_CH5,(u32)(&(LPSPI1->RDR)),G_W5500_Rx_Addr,MSGLEN+1);
    BSW_DMA_START(DMA_CH4);
    BSW_DMA_START(DMA_CH5);
}

void SPI1_DMA_IRQ_TX(void)
{
    BaseType_t xHigherPriorityTaskWoken = pdFALSE;

    spi1_dmatxirq++;
    LPSPI_ClearContCBit(LPSPI1);
    xSemaphoreGiveFromISR(xW5500TxSem, &xHigherPriorityTaskWoken);

}

void SPI1_DMA_IRQ_RX(void)
{
    static u8 s_u8_Dma5_Count = 0;
    BaseType_t xHigherPriorityTaskWoken = pdFALSE;


    spi1_dmarxirq++;
    xSemaphoreGiveFromISR(xW5500RxSem, &xHigherPriorityTaskWoken);
}

void SPI_DMA_WRITE(uint8_t* Addref, uint8_t* pTxBuf, uint16_t tx_len)
{
  if( xSemaphoreTake( xW5500TxSem, ( TickType_t ) 10 ) == pdFALSE ){
    G_u32_W5500_MUX_T_busy++;
    return;
  }
  BSW_DMA_REINIT(DMA_CH4,G_W5500_Tx_Addr,(u32)(&(LPSPI1->TDR)),tx_len+3); 
  BSW_DMA_REINIT(DMA_CH5,(u32)(&(LPSPI1->RDR)),G_W5500_Rx_Addr,tx_len+3+1);//时序对齐
  BSW_DMA_START(DMA_CH4);
  BSW_DMA_START(DMA_CH5);
  
  if( xSemaphoreTake( xW5500RxSem, ( TickType_t ) 10 ) == pdFALSE ){
    G_u32_W5500_MUX_R_busy++;
    return;
  }
  /* Waiting the end of Data transfer */
  //while(!(DMA->TCD[DMA_CH4].CSR & DMA_TCD_CSR_DONE_MASK) ){BSW_WD_REFRESH();}; // wait until the string is sent
}

void SPI_DMA_READ(uint8_t* Addref, uint8_t* pRxBuf, uint16_t rx_len)
{
    if( xSemaphoreTake( xW5500TxSem, ( TickType_t ) 10 ) == pdFALSE ){
      G_u32_W5500_MUX_T_busy++;
      return;
    }
    BSW_DMA_REINIT(DMA_CH4,G_W5500_Tx_Addr,(u32)(&(LPSPI1->TDR)),3+rx_len); 
    BSW_DMA_REINIT(DMA_CH5,(u32)(&(LPSPI1->RDR)),G_W5500_Rx_Addr,3+rx_len+1);//3+rx_len与tx 对齐
    BSW_DMA_START(DMA_CH4);
    BSW_DMA_START(DMA_CH5);

    if( xSemaphoreTake( xW5500RxSem, ( TickType_t ) 10 ) == pdFALSE ){
      G_u32_W5500_MUX_R_busy++;
      return;
    }

    /* Waiting the end of Data transfer */
    //while(!(DMA->TCD[DMA_CH4].CSR & DMA_TCD_CSR_DONE_MASK) ){BSW_WD_REFRESH();}; // wait until the string is sent
    //while(!(DMA->TCD[DMA_CH5].CSR & DMA_TCD_CSR_DONE_MASK) ){BSW_WD_REFRESH();}; // wait until the string is sent
}

void LPSPI1_transmit_8bits (uint8_t send)
{
    /* Wait for Tx FIFO available */
    while((LPSPI1->SR & LPSPI_SR_TDF_MASK)>>LPSPI_SR_TDF_SHIFT==0);
    /* Transmit data */
    LPSPI1->TDR = send;
    /* Clear TDF flag */
    LPSPI1->SR |= LPSPI_SR_TDF_MASK;
}
 
uint8_t LPSPI1_receive_8bits (void)
{
    uint16_t recieve = 0;
    /* Wait at least one RxFIFO entry */
    while((LPSPI1->SR & LPSPI_SR_RDF_MASK)>>LPSPI_SR_RDF_SHIFT==0);
    /* Read received data */
    recieve= LPSPI1->RDR;
    /* Clear RDF flag  */
    LPSPI1->SR |= LPSPI_SR_RDF_MASK;
    return recieve;
}

